The present invention relates to an input circuit of a microcomputer.
FIG. 6 shows a conventional microcomputer input circuit.
In this figure, 1 is a microcomputer, 2 is a power supply, 3 is an input terminal, 4 is a P-channel transistor, 5 is an OR circuit, 6 is a CPU, 7 is a timing signal generation circuit, and 8 is a switch.
FIG. 7 is a timing chart showing an operating state of FIG. 6.
A timing signal outputted from the timing signal generation circuit 7 operates at timing shown in FIG. 7.
The P-channel transistor 4 is turned xe2x80x9cONxe2x80x9d intermittently by an output signal (timing signal) of the timing signal generation circuit 7. As a result, the electric current, which flows from the power supply 2 via the transistor 4, the input terminal 3 and the switch 8 to a ground with the switch 8 being ON, is reduced.
There will be explained below an operation while the switch 8 is OFF.
When the timing signal generation circuit 7 outputs a xe2x80x9cLowxe2x80x9d-level signal, the P-channel transistor 4 is turned ON, and the input terminal 3 is in xe2x80x9cHixe2x80x9d level.
When the timing signal generation circuit 7 outputs a xe2x80x9cHixe2x80x9d-level signal so that the P-channel pull-up transistor 4 is turned OFF, the input terminal 3 is in xe2x80x9cLowxe2x80x9d level.
When the switch 8 is turned ON, the input terminal is in xe2x80x9cLowxe2x80x9d level.
The CPU 6 receives an interrupt signal (a signal trailing from xe2x80x9cHixe2x80x9d level to xe2x80x9cLowxe2x80x9d level) so as to execute an interrupt process.
In order to generate the interrupt signal in FIG. 7, the switch 8 is turned ON, and the input terminal 3 is in xe2x80x9cLowxe2x80x9d level so that the timing signal is in xe2x80x9cLowxe2x80x9d level. The CPU 6 then recognizes the xe2x80x9cLowxe2x80x9d level via the OR circuit 5 (receives the interrupt signal) so as to execute the interrupt process.
As shown in FIG. 7, when the switch 8 is turned ON so that the interrupt signal is generated in the CPU 6, the input terminal 3 is brought into xe2x80x9cLowxe2x80x9d level. Further, when the timing of the timing signal TS is in xe2x80x9cLowxe2x80x9d level, the-output of the OR circuit 5 is in xe2x80x9cLowxe2x80x9d level. As a result, the interrupt signal of the CPU 6 is transmitted so that the interrupt process is executed. Therefore, there arise the following problems.
Problem 1: Even when the switch 8 is turned ON, the CPU 6 cannot receive the interrupt signal unless the timing signal is in xe2x80x9cLowxe2x80x9d level so that response is slow (see FIG. 7).
Problem 2: The timing signal generation circuit 7 which is for the exclusive use of performing an intermittent pull-up operation is required.
It is an object of the present invention to obtain a microcomputer improving response to an interrupt request.
According to one aspect of this invention, in a microcomputer, an electric potential control unit controls an electric potential of an input terminal. A signal generation unit detects a change in the electric potential of the input terminal due to an input signal, and then generates an internal signal. The electric potential control unit is operated intermittently. When the electric potential control unit is inoperative, an electric potential maintenance unit maintains the electric potential of the input terminal. Therefore, response to the interrupt request can be quicken.
Further, in the microcomputer, a capacitor is connected to the input terminal as the electric potential maintenance unit, and then maintains the electric potential of the input terminal to the input terminal.
Further, in the microcomputer, a pull-up transistor controls the electric potential of the input terminal which is energized by a power supply. An input buffer circuit receives the change in the electric potential of the input terminal, and then supplies an interrupt signal to a CPU. A timing signal generation circuit generates a timing signal which controls conductivity of the pull-up transistor, and then operates it intermittently. A capacitor is connected to the input terminal.
According to another aspect of this invention, in a microcomputer, an edge selection unit generates an internal signal in response to a specified edge of a signal change due to application of an input signal to an input terminal. An electric potential control operation which is performed by an electric potential control unit is brought into inoperative state according to the operation of the edge selection unit. Therefore, response to the interrupt request can be quicken.
According to still another aspect of this invention, in a microcomputer, an edge selection unit generates an internal signal in response to a specified edge of a signal change due to application of an input signal to an input terminal. An electric potential control operation which is performed by an electric potential control unit is brought into inoperative state according to the operation of the edge selection unit. A gate unit interrupts conductivity between the electric potential control unit and the input terminal according to the operation of the edge selection unit and returns the conductivity after predetermined time. A signal hold unit obtains the conductivity according to transition of the electric potential control unit to inoperative state, and then secures an input signal of the edge selection unit. Therefore, response to the interrupt request can be quicken.
According to still another aspect of this invention, in a microcomputer, an edge selection unit generates an internal signal in response to a specified edge of a signal change due to application of an input signal to an input terminal. A one-shot pulse generation circuit brings an electric potential control operation performed by an electric potential control unit into inoperative state according to the operation of the edge selection unit. A gate unit composed of a transmission gate controls conductivity between the electric potential control unit and the input terminal. A timing unit composed of a delay circuit and a NOR circuit control the gate unit according to the operation of the one-shot pulse generation circuit performed by the edge selection unit so that the conductivity between the electric potential control unit and the input terminal is interrupted and is returned after predetermined time. A signal hold unit composed of a P-channel transistor which obtains the conductivity according to transition of the electric potential control unit to inoperative state and secures an input signal of the edge selection unit. Therefore, response to the interrupt request can be quicken.
Other objects and features of this invention will become apparent from the following description with reference to the accompanying drawings.